Cadence Design Systems
Lead Design Engineer
BANGALORE · full-time
Company's own board
First seen Oct 22 · seen live today · from Cadence Design Systems's own Workday board
The posting, as published
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
1. Proficient in Verilog coding and RTL design, data path designs,
2. Knowledge of RTL checks ex- LINT, SDC, CDC
3. Familiar with synthesis flow and timing constraints
4. Experience in writing Verilog testbench and running simulations.
5. Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display
We’re doing work that matters. Help us solve what others can’t.