AIML Pipeline/ Dataflow Design Lead

AIML Pipeline / Dataflow Design Lead Location: Bangalore, India |Company: LTSCT — L&T Semiconductor Technologies Limited Reporting To: Senior Architect, DC HW Systems | Experience: 10 years (mandatory) Role Summary We are hiring two AIML Pipeline / Dataflow Design Leads to implement the BFOS-MPE (Broadcast-Fed Output-Stationary Matrix Processing Engine) — the compute heart of xPU. You will own the compute datapath, the broadcast network, PE array control, sparsity engines (SWS), and dual-mode (…